bit synchronization

英 [bɪt ˌsɪŋkrənaɪ'zeɪʃ(ə)n] 美 [bɪt ˌsɪŋkrənaɪ'zeɪʃ(ə)n]

网络  位同步; 比特同步; 位元同步

计算机



双语例句

  1. Bit Synchronization Loop Based on Early-late Gate by FPGA
    基于早迟门位同步环的FPGA实现
  2. Method of Bit Synchronization and Data Recovery Based on Software
    一种基于软件的位同步和数据恢复方法
  3. In this paper, a new bit synchronization scheme for TDMA digital transmission system it proposed.
    本文针对时分多址数字传输系统提出了一种新的位同步方案。
  4. A Symbol Timing Estimation Algorithm for Bit Synchronization MF-TDMA System
    一种用于符号同步MF-TDMA系统的定时偏差估计算法
  5. A MLE-based Bit Synchronization Scheme with Automatic Order Changing
    一种极大似然估计的自动变阶位同步方案
  6. Self-Adaptive Maximum Likelihood Method for GPS Bit Synchronization
    一种自适应最大似然GPS比特同步方法
  7. A New Fast Bit Synchronization System Design Based on FPGA
    一种基于FPGA的新型快速位同步系统设计
  8. The most important steps for navigation data extraction are bit synchronization and frame synchronization.
    导航电文提取中最重要的步骤是位同步和帧同步。
  9. Under weak signal environments, bit synchronization is very important and difficult in GPS receiver design.
    弱信号下的比特同步在GPS的接收机设计中是一个重点也是一个难点。
  10. Taking PCM/ DPSK for example, the effects by Doppler velocity during the course of bit synchronization and demodulation are analyzed.
    并以PCM/DPSK信号为例,分析了多普勒频率对位同步及解调过程的影响。
  11. Bit synchronization circuit design for digital communication system
    数字通信系统位同步电路设计
  12. Study of Bit Synchronization in FH/ DS Communication System
    FH/DS通信系统的位同步研究
  13. To demodulate GMSK signal, DSP is used in receiver to achieve error spectrum estimation, bit synchronization recovery and decode.
    为了实现GMSK信号解调,接收机中DSP实现了调制信号的误差频谱估计、位同步恢复及译码。
  14. This paper not only makes a detail description of the arithmetic theory of this method, but also realizes the bit synchronization scheme with FPGA by VHDL programming.
    不但详细描述了该方法的算法原理,而且还用FPGA技术通过VHDL硬件描述语言编程实现了该位同步提取方案。
  15. Design and FPGA Implementation of a Anti-fading Bit Synchronization Method
    一种抗衰落的位同步设计和FPGA实现
  16. From the aspects of the carrier wave synchronization, the bit synchronization, the frame synchronization and the network synchronization, the technology of the frequency hopping synchronization have been analyzed and discussed detailedly.
    从载波同步、位同步、帧同步和网同步四个方面详细分析讨论了跳频同步技术。
  17. A scheme to use radar chirp signal passing through matched filter to implement quick and reliable bit synchronization was proposed, and some related computer-based simulations was also finished.
    提出了利用雷达chirp信号通过匹配滤波器实现快速、可靠位同步的方法,进行了相应的理论分析和计算机仿真,证明这是一种快速、可靠的位同步方法;
  18. A New Method to Realize Bit Synchronization of PCM/ FM
    一种新的软件实现PCM/FM码同步的方法
  19. A fast bit synchronization technique PON for upstream cell is presented.
    介绍一种PON上行信号元快速比特同步结构及其实现。
  20. The bit synchronization detect is very important in opened loop timing recovery of all digital receivers.
    位同步检测是实现全数字接收机开环定时恢复的关键技术。
  21. The digital phase-locked loops design is a key technology for carrier and bit synchronization in coherent demodulation digital receiver. Large frequency offset and low SNR add more difficulties of the loop design from two different ways.
    全数字锁相环设计是相干解调全数字接收机载波同步和位同步的关键技术,而大频偏和低信噪比分别从两个方面增加了环路设计的难度。
  22. And this paper detailedly discusses the method of realization of the carrier wave and bit synchronization, and designs and realizes the bit synchronization clock extraction under Quartus II IDE.
    并详细分析讨论了载波同步和位同步的实现方法,在QuartusⅡ仿真环境下设计实现了位同步时钟的提取。
  23. For synchronization used a rapid synchronization algorithm which based on the energy detection, implementation by the correlation, bit synchronization and frame synchronization can be achievement at the same time.
    文中着重研究了突发通信的同步和频偏纠正算法,针对同步算法选取了一种基于能量检测法的快速位同步算法,采用相关器实现,同时实现位同步和帧同步。
  24. Then analyze demodulation of IF signal, bit synchronization, pseudorange solution of GPS software receiver.
    接着分析了跟踪过程中导航数据的解调,以及位同步的实现,软件接收机的伪距解算。
  25. On this basis, QPSK modulator and demodulator are designed using HDL ( hardware description language) in Altera Quartus ⅱ software. The design of NCO, shaping filter, Loop Filter and bit synchronization is illuminated in detail.
    在此基础上,本文采用硬件描述语言在Altera公司QuartusⅡ开发环境下设计了QPSK调制解调器,详细介绍了数字控制振荡器、成形滤波器、环路滤波器和位同步模块的设计过程。
  26. We introduced three methods of bit synchronization. The Phase difference method was suitable for use with large frequency offset. The likelihood method was suitable for use in weak signal environment, but sensitive to frequency offset.
    介绍了三种比特同步的方法并比较了它们的性能,相位差分法适用于大频偏条件下的比特同步,似然估计法适用于弱信号环境,但是其对频偏比较敏感。
  27. The theory of Costas Loop commonly used in the QPSK demodulator and bit synchronization Digital Phase Locked Loop ( DPLL) is analyzed in demodulator.
    解调原理中分析了QPSK解调中常用的科斯塔斯(Costas)环的基本原理和位同步全数字锁相环的实现原理。
  28. Carrier synchronization, bit synchronization and frame synchronization algorithm are studied under the condition of the demodulation algorithm, and an improved algorithm is given based on the existing carrier synchronization algorithm.
    在解调算法确定的条件下,详细的研究了载波同步、位同步、帧同步的算法,并在现有载波同步算法的基础上给出了一种改进的算法。
  29. The carrier phase tracking and bit synchronization algorithm is also carried out a similar analysis, computer simulation has been through the algorithm for SNR loss.
    对全数字Costas环载波相位跟踪和基于Gardner算法的反馈插值码元同步算法进行了理论分析和性能仿真,通过计算机仿真得到了载波和位同步算法的信噪比损失。
  30. Symbol timing recovery ( Bit Synchronization) is the key technology in the digital communication.
    码元定时恢复(位同步)技术是数字通信中的关键技术。